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INTEGRATED CIRCUITS
74LVT273 3.3V Octal D flip-flop
Product specification Supersedes data of 1994 May 11 IC23 Data Handbook 1998 Feb 19
Philips Semiconductors
Philips Semiconductors
Product specification
3.3V Octal D flip-flop
74LVT273
FEATURES
DESCRIPTION
The LVT273 is a high-performance BiCMOS product designed for VCC operation at 3.3V. This device has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously. The register is fully edge-triggered. The state of each D input, one setup time before the Low-to-High clock transition, is transferred to the corresponding flip-flop's Q output. All outputs will be forced Low independent of Clock or Data inputs by a Low voltage level on the MR input. The device is useful for applications where the true output only is required and the CP and MR are common elements.
* Eight edge-triggered D-type flip-flops * Buffered common clock * Buffered asynchronous Master Reset * Output capability: +64mA/-32mA * TTL input and output switching levels * Input and output interface capability to systems at 5V supply * Bus-hold data inputs eliminate the need for external pull-up
resistors to hold unused inputs
* Power-up reset * Live insertion/extraction permitted * No bus current loading when output is tied to 5V bus * Latchup protection exceeds 500 mA per JEDEC Std 17 * ESD protection exceeds 2000V per Mil Std 883 Method 3015 and
200V per Machine Model.
QUICK REFERENCE DATA
SYMBOL tPLH tPHL CIN PARAMETER Propagation delay CP to Qn Input capacitance CONDITIONS Tamb = 25C; GND = 0V CL = 50pF; VCC = 3.3V VI = 0V or 3.0V TYPICAL 3.5 3.5 4 UNIT ns pF
ORDERING INFORMATION
PACKAGES 20-Pin Plastic SOL 20-Pin Plastic SSOP Type II 20-Pin Plastic TSSOP Type I TEMPERATURE RANGE -40C to +85C -40C to +85C -40C to +85C OUTSIDE NORTH AMERICA 74LVT273 D 74LVT273 DB 74LVT273 PW NORTH AMERICA 74LVT273 D 74LVT273 DB 74LVT273PW DH DWG NUMBER SOT163-1 SOT339-1 SOT360-1
PIN CONFIGURATION
MR Q0 D0 D1 Q1 Q2 D2 D3 Q3 1 2 3 4 5 6 7 8 9 20 19 18 17 16 15 14 13 12 11 VCC Q7 D7 D6
LOGIC SYMBOL
3
4
7
8 13
14 17 18
D0 D1 D2 D3 D4 D5 D6 D7 11 CP MR Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
Q6 Q5 D5 D4 Q4 CP 2 5 6 9 12 15 16 19 1
GND 10
SV00018
SV00017
1998 Feb 19
2
853-1740 18985
Philips Semiconductors
Product specification
3.3V Octal D flip-flop
74LVT273
LOGIC SYMBOL (IEEE/IEC)
1 11 R C1
FUNCTION TABLE
INPUTS MR L CP X Dn X h l OUTPUTS Q0 - Q7 L H L OPERATING MODE Reset (clear) Load "1" Load "0"
3 4 7 8 13 14 17 18
1D
2 5 6 9 12 15 16 19
H H
SV00019
H L X Q0 Retain state H = High voltage level h = High voltage level one set-up time prior to the Low-to-High clock transition L = Low voltage level l = Low voltage level one set-up time prior to the Low-to-High clock transition X = Don't care = Low-to-High clock transition Q0 = Output as it was
PIN DESCRIPTION
PIN NUMBER 11 3, 4, 7, 8, 13, 14, 17, 18 2, 5, 6, 9, 12, 15, 16, 19 1 10 20 SYMBOL CP D0 - D7 Q0 - Q7 MR GND VCC NAME AND FUNCTION Clock pulse input (active rising edge) Data inputs Data outputs Master Reset input (active-Low) Ground (0V) Positive supply voltage
LOGIC DIAGRAM
D0 3 11 CP D1 4 D2 7 D3 8 D4 13 D5 14 D6 17 D7 18
D CP RD 1 MR
Q
D CP RD
Q
D CP RD
Q
D CP RD
Q
D CP RD
Q
D CP RD
Q
D CP RD
Q
D CP RD
Q
2 Q0
5 Q1
6 Q2
9 Q3
12 Q4
15 Q5
16 Q6
19 Q7
SV00020
1998 Feb 19
3
Philips Semiconductors
Product specification
3.3V Octal D flip-flop
74LVT273
ABSOLUTE MAXIMUM RATINGS1, 2
SYMBOL VCC IIK VI IOK VOUT IO OUT Tstg PARAMETER DC supply voltage DC input diode current DC input voltage3 VO < 0 output in Off or High state Output in Low state DC output current Output in High State Storage temperature range -64 -65 to 150 C VI < 0 CONDITIONS RATING -0.5 to +4.6 -50 -0.5 to +7.0 -50 -0.5 to +7.0 128 mA UNIT V mA V mA V
DC output diode current DC output voltage3
NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150C. 3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
LIMITS SYMBOL VCC VI VIH VIL IOH IOL t/v Tamb DC supply voltage Input voltage High-level input voltage Low-level Input voltage High-level output current Low-level output current Input transition rise or fall rate; Outputs enabled Operating free-air temperature range -40 PARAMETER MIN 2.7 0 2.0 0.8 -32 64 10 +85 MAX 3.6 5.5 V V V V mA mA ns/V C UNIT
1998 Feb 19
4
Philips Semiconductors
Product specification
3.3V Octal D flip-flop
74LVT273
DC ELECTRICAL CHARACTERISTICS
LIMITS SYMBOL PARAMETER TEST CONDITIONS Temp = -40C to +85C MIN VIK Input clamp voltage VCC = 2.7V; IIK = -18mA VCC = 2.7 to 3.6V; IOH = -100A VOH High-level output voltage VCC = 2.7V; IOH = -8mA VCC = 3.0V; IOH = -32mA VCC = 2.7V; IOL = 100A VCC = 2.7V; IOL = 24mA VOL Low-level output voltage VCC = 3.0V; IOL = 16mA VCC = 3.0V; IOL = 32mA VCC = 3.0V; IOL = 64mA VRST Power-up output low voltage4 VCC = 3.6V; IO = 1mA; VI = GND or VCC VCC = 0 or 3.6V; VI = 5.5V II Input l k I t leakage current t VCC = 3.6V; VI = VCC or GND VCC = 3.6V; VI = VCC VCC = 3.6V; VI = 0 IOFF IHOLD Output off current Bus Hold current A inputs5 Current into an output in the High state when VO > VCC Quiescent supply current Additional supply current per input pin2 VCC = 0V; VI or VO = 0 to 4.5V VCC = 3V; VI = 0.8V VCC = 3V; VI = 2.0V VCC = 0V to 3.6V; VCC = 3.6V IEX ICCH ICCL ICC VO = 5.5V; VCC = 3.0V VCC = 3.6V; Outputs High, VI = GND or VCC, IO = 0 VCC = 3.6V; Outputs Low, VI = GND or VCC, IO = 0 VCC = 3V to 3.6V; One input at VCC -0.6V, Other inputs at VCC or GND 75 -75 500 60 0.13 3 0.1 125 0.19 12 0.2 mA mA A Control pins Data pins3 VCC-0.2 2.4 2.0 TYP1 -0.9 VCC-0.1 2.5 2.2 0.1 0.3 0.25 0.3 0.4 0.13 1 0.1 0.1 -1 1 150 -150 A 0.2 0.5 0.4 0.5 0.55 0.55 10 1 1 -5 100 A A A V V V MAX -1.2 V UNIT
NOTES: 1. All typical values are at VCC = 3.3V and Tamb = 25C. 2. This is the increase in supply current for each input at the specified voltage level other than VCC or GND 3. Unused pins at VCC or GND. 4. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power. 5. This is the bus hold overdrive current required to force the input to the opposite logic state.
AC CHARACTERISTICS
GND = 0V; tR = tF = 2.5ns; CL = 50pF, RL = 500; Tamb = -40C to +85C. LIMITS SYMBOL PARAMETER WAVEFORM MIN fMAX tPLH tPHL tPHL Maximum clock frequency Propagation delay CP to Qn Propagation delay MR to Qn 1 1 2 150 1.7 1.9 1.3 3.5 3.5 3.2 5.5 5.5 6.2 6.3 5.9 6.2 VCC = 3.3V 0.3V TYP1 MAX VCC = 2.7V MAX MHz ns ns UNIT
NOTE: 1. All typical values are at VCC = 3.3V and Tamb = 25C. 1998 Feb 19 5
Philips Semiconductors
Product specification
3.3V Octal D flip-flop
74LVT273
AC SETUP REQUIREMENTS
GND = 0V; tR = tF = 2.5ns; CL = 50pF, RL = 500, Tamb = -40C to +85C. LIMITS SYMBOL PARAMETER WAVEFORM VCC = +3.3 0.3V MIN ts(H) ts(L) th(H) th(L) tw(H) tw(L) tw(L) tREC Setup time, High or Low Dn to CP Hold time, High or Low Dn to CP Clock pulse width High or Low Master Reset pulse width, Low Recovery time MR to CP 3 3 1 2 2 2.3 2.3 0 0 3.3 3.3 3.3 2.7 TYP 1.0 1.0 -0.6 -0.6 1.5 1.5 1.5 1.0 VCC = 2.7V MIN 2.7 2.7 0 0 3.3 3.3 3.3 3.2 ns ns ns ns ns UNIT
AC WAVEFORMS
VM = 1.5V, VIN = GND to 2.7V
1/fMAX 2.7V
Dn
CP
1.5V
1.5V
1.5V 0V
tw(H) tPHL
tw(L) tPLH 1.5V 1.5V VOL VOH
CP
Qn
NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance.
SV00108
SV00021
Waveform 1. Propagation Delay, Clock Input to Output, Clock Pulse Width, and Maximum Clock Frequency
2.7V
MR
1.5V
1.5V 0V tw(L) tREC 2.7V
CP
tPHL
1.5V 0V VOH 1.5V VOL
Qn
SV00107
Waveform 2. Master Reset Pulse Width, Master Reset to Output Delay and Master Reset to Clock Recovery Time
1998 Feb 19
6
EEEEEEEEE EEE E EEEEEEEEE EEE E EEEEEEEEE EEE E
1.5V 1.5V 1.5V 1.5V ts(H) th(H) ts(L) th(L) 1.5V 1.5V
2.7V
0V
2.7V
0V
Waveform 3. Data Setup and Hold Times
Philips Semiconductors
Product specification
3.3V Octal D flip-flop
74LVT273
TEST CIRCUIT AND WAVEFORMS
VCC 90% NEGATIVE PULSE VIN PULSE GENERATOR RT D.U.T. CL RL POSITIVE PULSE VOUT VM 10% tTHL (tF) tTLH (tR) 90% VM tW 90% VM 10% 0V 10% 0V tTLH (tR) tTHL (tF) AMP (V) tW VM 90% AMP (V)
Test Circuit for Outputs
10%
VM = 1.5V Input Pulse Definition
DEFINITIONS
RL = Load resistor; see AC CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC CHARACTERISTICS for value. RT = Termination resistance should be equal to ZOUT of pulse generators.
INPUT PULSE REQUIREMENTS FAMILY Amplitude 74LVT 2.7V Rep. Rate 10MHz tW tR tF
500ns 2.5ns 2.5ns
SV00022
1998 Feb 19
7
Philips Semiconductors
Product specification
3.3V Octal D flip-flop
74LVT273
SO20: plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
1998 Feb 19
8
Philips Semiconductors
Product specification
3.3V Octal D flip-flop
74LVT273
SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm
SOT339-1
1998 Feb 19
9
Philips Semiconductors
Product specification
3.3V Octal D flip-flop
74LVT273
TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm
SOT360-1
1998 Feb 19
10
Philips Semiconductors
Product specification
3.3V Octal D flip-flop
74LVT273
Data sheet status
Data sheet status Objective specification Preliminary specification Product specification Product status Development Qualification Definition [1] This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
Production
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support -- These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088-3409 Telephone 800-234-7381 (c) Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. print code Document order number: Date of release: 05-96 9397-750-03534
Philips Semiconductors
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